EP1S20B672C6 vs EP1S20B672C6N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1S20B672C6 sa pamamagitan ng Intel at EP1S20B672C6N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP1S20B672C6 | EP1S20B672C6N |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Huling Pagbili | NRND |
| Family | Stratix | Stratix |
| Manufacturer | Intel (formerly Altera) | — |
| Logic Elements | 18,460 | — |
| Embedded Memory Bits | 1,669,248 | — |
| User I/O Count | 426 | — |
| Packhaging | 672-ball FineLine BGA (672-BBGA) | 672-ball BGA (672-BBGA), 35 x 35 mm, 1.27 mm pitch |
| Package Dimensions | 35 mm x 35 mm | — |
| Ball Pitch | 1.27 mm | — |
| Process Technology | 130 nm CMOS | 130 nm CMOS |
| Core Supply Voltage (VCCINT) | 1.5 V | — |
| I/O Supply Voltage (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V | — |
| Speed Grade | C6 | 6 |
| Temperature na Operasyon | 0 C to 85 C (commercial) | 0 C to +85 C (Commercial) |
| Maximum Internal Frequency | 450.05 MHz | — |
| Logic Family | CMOS | — |
| Configuration Method | PS / PPS / PPA / JTAG | Passive Serial / Fast Passive Parallel / JTAG |
| Tindminan RoHS | [DATA_NEEDED: rohs status] | Compliant |
| Series | — | EP1S20 |
| Logic Elements (LE) | — | 18,460 |
| Logic Array Blocks (LAB) | — | 1,846 |
| Embedded Memory | — | 1,669,248 bits |
| Maximum User I/O | — | 426 |
| Core Voltage | — | 1.5 V |
| Uri ng Pagpapasok | — | Surface Mount |
| Katayuan ng Lifecycle | — | Not Recommended for New Designs (NRND) |