EP1S20B672C6 vs EP1S20F672C6N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1S20B672C6 sa pamamagitan ng Intel at EP1S20F672C6N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP1S20B672C6 | EP1S20F672C6N |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Huling Pagbili | Huling Pagbili |
| Family | Stratix | Stratix |
| Manufacturer | Intel (formerly Altera) | — |
| Logic Elements | 18,460 | 18,460 |
| Embedded Memory Bits | 1,669,248 | — |
| User I/O Count | 426 | 426 |
| Packhaging | 672-ball FineLine BGA (672-BBGA) | 672-BBGA (FineLine BGA) 35 x 35 mm |
| Package Dimensions | 35 mm x 35 mm | — |
| Ball Pitch | 1.27 mm | — |
| Process Technology | 130 nm CMOS | — |
| Core Supply Voltage (VCCINT) | 1.5 V | — |
| I/O Supply Voltage (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V | — |
| Speed Grade | C6 | -6 |
| Temperature na Operasyon | 0 C to 85 C (commercial) | 0 C to 85 C (commercial) |
| Maximum Internal Frequency | 450.05 MHz | — |
| Logic Family | CMOS | CMOS |
| Configuration Method | PS / PPS / PPA / JTAG | — |
| Tindminan RoHS | [DATA_NEEDED: rohs status] | Compliant |
| Total RAM Bits | — | 1,669,248 |
| Package Pitch | — | 1.27 mm |
| Core Voltage | — | 1.5 V |
| Configuration Mode | — | PS, FPP, JTAG |
| Embedded DSP Blocks | — | Yes (36 x 36-bit multipliers) |
| TriMatrix Memory | — | M512, M4K, M-RAM blocks |
| PLLs | — | 12 (4 enhanced) |
| Global Clock Networks | — | 16 |
| Uri ng Pagpapasok | — | Surface Mount |
| Lead Free | — | Yes |