EP1S20B672C6N vs EP1S20B672C7N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1S20B672C6N sa pamamagitan ng Intel at EP1S20B672C7N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP1S20B672C6N | EP1S20B672C7N |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Obsolete |
| Family | Stratix | Stratix (original) |
| Series | EP1S20 | Stratix |
| Logic Elements (LE) | 18,460 | — |
| Logic Array Blocks (LAB) | 1,846 | — |
| Embedded Memory | 1,669,248 bits | — |
| Maximum User I/O | 426 | 426 |
| Process Technology | 130 nm CMOS | 0.13 µm CMOS |
| Core Voltage | 1.5 V | — |
| Packhaging | 672-ball BGA (672-BBGA), 35 x 35 mm, 1.27 mm pitch | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (BGA) |
| Temperature na Operasyon | 0 C to +85 C (Commercial) | 0 °C to 85 °C (Commercial Extended) |
| Speed Grade | 6 | -7 |
| Configuration Method | Passive Serial / Fast Passive Parallel / JTAG | — |
| Tindminan RoHS | Compliant | [DATA_NEEDED: RoHS compliance] |
| Katayuan ng Lifecycle | Not Recommended for New Designs (NRND) | — |
| Logic Elements (LEs) | — | 18,460 |
| LABs / CLBs | — | 1,846 |
| Embedded Memory Bits | — | 1,669,248 bits |
| Number of Pins / Balls | — | 672 |
| Package Type | — | 672-BBGA (Fine-pitch BGA, 35 × 35 mm, 1.27 mm pitch) |
| Supply Voltage (Core, VCCINT) | — | 1.5 V |
| Level ng MSL | — | 3 (per JEDEC J-STD-020) |
| Logic Family | — | CMOS |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |