EP1S25F672C6 vs EP1S25F672C7N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1S25F672C6 sa pamamagitan ng Intel at EP1S25F672C7N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP1S25F672C6 | EP1S25F672C7N |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Huling Pagbili | Obsolete |
| Family | Stratix | — |
| Logic Elements | 25,660 | — |
| Configurable Logic Blocks (CLBs) | 2,852 | — |
| Total RAM Bits | 1,944,576 | — |
| DSP Blocks | 14 | — |
| Maximum User I/O | 473 | 473 |
| Packhaging | 672-BBGA (FineLine BGA, 35 x 35 mm, 1.27 mm pitch) | 672-BBGA (FineLine BGA), 35 × 35 mm, 1.27 mm pitch |
| Core Voltage | 1.5 V | — |
| Process Technology | 130 nm CMOS | 0.13 µm CMOS |
| Temperature na Operasyon | 0C to +85C (Commercial) | 0 °C to 85 °C (commercial) |
| Logic Family | CMOS | — |
| Speed Grade | 6 | — |
| Configuration Method | JTAG, Passive Serial, Fast Passive Parallel, Active Serial | JTAG / Passive Serial / Active Serial |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Tindminan RoHS | Compliant | [DATA_NEEDED: confirm from product page] |
| PLL Count (Maximum) | 12 (including enhanced PLLs) | — |
| Device Family | — | Stratix |
| Logic Elements (LEs) | — | 25,660 |
| Logic Array Blocks (LABs) | — | 2,566 |
| Embedded Memory Bits | — | 1,944,576 |
| Number of I/O Pins | — | 672 (BGA balls) |
| Core Supply Voltage (VCCINT) | — | 1.5 V |
| I/O Supply Voltage (VCCIO) | — | [DATA_NEEDED: bank-dependent 1.2 V–3.3 V] |
| Level ng MSL | — | [DATA_NEEDED: MSL rating] |