EP1S25F672C7 vs EP1S25F672C7N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1S25F672C7 sa pamamagitan ng Intel at EP1S25F672C7N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP1S25F672C7 | EP1S25F672C7N |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Huling Pagbili | Obsolete |
| Series | Stratix | — |
| Manufacturer | Intel (formerly Altera) | — |
| Logic Elements (LEs) | 25,660 | 25,660 |
| Total RAM Bits | 1,944,576 | — |
| Configurable Logic Blocks (CLBs) | 2,852 | — |
| User I/O Count | 473 | — |
| Packhaging | 672-BBGA (FBGA), 35 x 35 mm, 1.27 mm pitch | 672-BBGA (FineLine BGA), 35 × 35 mm, 1.27 mm pitch |
| Core Voltage | 1.5 V | — |
| Process Technology | 130 nm CMOS | 0.13 µm CMOS |
| Maximum Core Frequency | 420 MHz | — |
| Speed Grade | C7 (-7 commercial) | — |
| Temperature na Operasyon | 0 °C to +85 °C (commercial) | 0 °C to 85 °C (commercial) |
| Embedded Multipliers (18x18) | 224 | — |
| TriMatrix Memory Blocks | Yes (MRAM / M512 / M4K) | — |
| DLLs | 6 | — |
| PLLs | 2 | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Tindminan RoHS | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: confirm from product page] |
| Device Family | — | Stratix |
| Logic Array Blocks (LABs) | — | 2,566 |
| Embedded Memory Bits | — | 1,944,576 |
| Maximum User I/O | — | 473 |
| Number of I/O Pins | — | 672 (BGA balls) |
| Core Supply Voltage (VCCINT) | — | 1.5 V |
| I/O Supply Voltage (VCCIO) | — | [DATA_NEEDED: bank-dependent 1.2 V–3.3 V] |
| Configuration Method | — | JTAG / Passive Serial / Active Serial |
| Level ng MSL | — | [DATA_NEEDED: MSL rating] |