EP1S25F672C7N vs EP1S25F672C6 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1S25F672C7N sa pamamagitan ng Altera at EP1S25F672C6 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP1S25F672C7N | EP1S25F672C6 |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Huling Pagbili |
| Device Family | Stratix | — |
| Logic Elements (LEs) | 25,660 | — |
| Logic Array Blocks (LABs) | 2,566 | — |
| Embedded Memory Bits | 1,944,576 | — |
| Maximum User I/O | 473 | 473 |
| Number of I/O Pins | 672 (BGA balls) | — |
| Packhaging | 672-BBGA (FineLine BGA), 35 × 35 mm, 1.27 mm pitch | 672-BBGA (FineLine BGA, 35 x 35 mm, 1.27 mm pitch) |
| Process Technology | 0.13 µm CMOS | 130 nm CMOS |
| Core Supply Voltage (VCCINT) | 1.5 V | — |
| I/O Supply Voltage (VCCIO) | [DATA_NEEDED: bank-dependent 1.2 V–3.3 V] | — |
| Temperature na Operasyon | 0 °C to 85 °C (commercial) | 0C to +85C (Commercial) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Configuration Method | JTAG / Passive Serial / Active Serial | JTAG, Passive Serial, Fast Passive Parallel, Active Serial |
| Level ng MSL | [DATA_NEEDED: MSL rating] | — |
| Tindminan RoHS | [DATA_NEEDED: confirm from product page] | Compliant |
| Family | — | Stratix |
| Logic Elements | — | 25,660 |
| Configurable Logic Blocks (CLBs) | — | 2,852 |
| Total RAM Bits | — | 1,944,576 |
| DSP Blocks | — | 14 |
| Core Voltage | — | 1.5 V |
| Logic Family | — | CMOS |
| Speed Grade | — | 6 |
| PLL Count (Maximum) | — | 12 (including enhanced PLLs) |