EP1S25F672I7 vs EP1S25F672C7N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1S25F672I7 sa pamamagitan ng Intel at EP1S25F672C7N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP1S25F672I7 | EP1S25F672C7N |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Series | Stratix | — |
| Family | EP1S25 | — |
| Number of Logic Elements | 25,660 | — |
| Number of LABs/CLBs | 2,566 | — |
| Total RAM Bits | 1,944,576 | — |
| Number of I/O Pins | 473 | 672 (BGA balls) |
| Supply Voltage (Core) | 1.5 V | — |
| Packhaging | 672-FBGA (672-BBGA) | 672-BBGA (FineLine BGA), 35 × 35 mm, 1.27 mm pitch |
| Package Dimensions | 35 x 35 mm | — |
| Ball Pitch | 1.27 mm | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Operating Temperature (datasheet) | -40 °C to +100 °C | — |
| Operating Temperature (distributor listing) | 0 °C to +85 °C | — |
| Logic Family | CMOS | — |
| Process Technology | 0.13 µm CMOS | 0.13 µm CMOS |
| Tindminan RoHS | Compliant | [DATA_NEEDED: confirm from product page] |
| Programming Method | JTAG / in-system | — |
| Device Family | — | Stratix |
| Logic Elements (LEs) | — | 25,660 |
| Logic Array Blocks (LABs) | — | 2,566 |
| Embedded Memory Bits | — | 1,944,576 |
| Maximum User I/O | — | 473 |
| Core Supply Voltage (VCCINT) | — | 1.5 V |
| I/O Supply Voltage (VCCIO) | — | [DATA_NEEDED: bank-dependent 1.2 V–3.3 V] |
| Temperature na Operasyon | — | 0 °C to 85 °C (commercial) |
| Configuration Method | — | JTAG / Passive Serial / Active Serial |
| Level ng MSL | — | [DATA_NEEDED: MSL rating] |