EP1S30F780I6N vs EP1S20F780I6N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1S30F780I6N sa pamamagitan ng Intel at EP1S20F780I6N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EP1S30F780I6N - Stratix FPGA, 32.5K LE, 780-BGA | Intel / Altera
EP1S30F780I6N ⚠ Huling PagbiliAltera
EP1S20F780I6N - Stratix 18460-LE FPGA 780-FBGA Industrial | Intel
EP1S20F780I6N ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EP1S30F780I6N | EP1S20F780I6N |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Huling Pagbili | Huling Pagbili |
| Family | Stratix | — |
| Logic Elements | 32,470 | — |
| Total RAM Bits | 3,317,184 bits | — |
| User I/O Count | 597 | 586 |
| Package Type | 780-BBGA, FCBGA (FineLine BGA) | — |
| Temperature na Operasyon | -40C to +100C (Industrial, I6) | -40 °C to +85 °C (Industrial) |
| Process Technology | 130 nm | — |
| Supply Voltage (Core) | [DATA_NEEDED: core voltage] | — |
| I/O Standards Supported | LVTTL, LVCMOS, LVDS, SSTL, HSTL | — |
| Lead-Free / RoHS | Lead-free terminal finish (N suffix), RoHS-compliant | — |
| Speed Grade | -6 | -6 |
| DSP Blocks | Yes (TriMatrix + DSP blocks per Stratix family) | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Level ng MSL | 3 (per typical FBGA moisture sensitivity) | — |
| JEDEC Code (e1) | e1 (Pb-free / matte tin) | — |
| Series | — | Stratix |
| Logic Elements (LE) | — | 18460 |
| Logic Array Blocks (LABs) | — | 1846 |
| Total Memory Bits | — | 1669248 |
| Number of LABs/CLBs | — | 1846 |
| Core Voltage | — | 1.5 V |
| Packhaging | — | 780-BBGA, FCBGA |
| Package Pin/Ball Count | — | 780 |
| Ball Pitch | — | 1.0 mm |
| Tindminan RoHS | — | [DATA_NEEDED: RoHS status] |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |