EP1S40F1020C5 vs EP1S60F1020C5 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1S40F1020C5 sa pamamagitan ng Intel at EP1S60F1020C5 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP1S40F1020C5 | EP1S60F1020C5 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Huling Pagbili |
| Family | Stratix | Stratix (EP1S) |
| Series | Stratix I | Stratix |
| Logic Elements | 41,250 | 57,120 |
| Logic Array Blocks (LABs) | 4,125 | — |
| Maximum User I/Os | 773 | — |
| Embedded Memory | 3.4 Mbits (TriMatrix) | — |
| DSP Blocks | Yes (dedicated hardware multipliers) | — |
| Process Technology | 130 nm | 0.13 µm CMOS, 1.5 V core |
| Core Voltage | 1.425 V to 1.575 V | 1.5 V |
| Speed Grade | C5 | C5 |
| Packhaging | 1020-ball FC-FBGA (33 mm x 33 mm) | — |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount |
| Temperature na Operasyon | 0C to +85C (Commercial) | 0 C to 85 C (Commercial) |
| Maximum Internal Clock | up to 500 MHz | — |
| I/O Standards Supported | LVTTL, LVCMOS, SSTL, HSTL, LVDS, PCI | — |
| Tindminan RoHS | [DATA_NEEDED: rohs status] | — |
| Configurable Logic Blocks (CLBs) | — | 6,570 |
| Total RAM Bits | — | 5,215,104 (5.2 Mbit) |
| User I/O Pins | — | 773 |
| Number of PLLs | — | 12 |
| I/O Voltage Tolerance | — | 3.3 V (multi-standard) |
| Package Type | — | FBGA-1020 (FineLine BGA) |
| Package Dimensions | — | 33 x 33 mm |
| Ball Pitch | — | 1.0 mm |