EP1S40F1020C5 vs EP1SGX25DF1020C5ES Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1S40F1020C5 sa pamamagitan ng Intel at EP1SGX25DF1020C5ES sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EP1SGX25DF1020C5ES - Stratix GX FPGA, 25K LE, FBGA-1020 | Altera
EP1SGX25DF1020C5ES ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EP1S40F1020C5 | EP1SGX25DF1020C5ES |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Huling Pagbili |
| Family | Stratix | — |
| Series | Stratix I | — |
| Logic Elements | 41,250 | — |
| Logic Array Blocks (LABs) | 4,125 | — |
| Maximum User I/Os | 773 | — |
| Embedded Memory | 3.4 Mbits (TriMatrix) | 1,944,576 bits |
| DSP Blocks | Yes (dedicated hardware multipliers) | — |
| Process Technology | 130 nm | 130 nm |
| Core Voltage | 1.425 V to 1.575 V | — |
| Speed Grade | C5 | C5 |
| Packhaging | 1020-ball FC-FBGA (33 mm x 33 mm) | — |
| Uri ng Pagpapasok | Surface Mount (BGA) | — |
| Temperature na Operasyon | 0C to +85C (Commercial) | 0 °C to 85 °C (commercial) |
| Maximum Internal Clock | up to 500 MHz | — |
| I/O Standards Supported | LVTTL, LVCMOS, SSTL, HSTL, LVDS, PCI | — |
| Tindminan RoHS | [DATA_NEEDED: rohs status] | — |
| Device Family | — | Stratix GX |
| Logic Family | — | CMOS |
| Logic Elements (LEs) | — | 25,660 |
| Configurable Logic Blocks (CLBs) | — | 2,566 |
| Core Supply Voltage | — | 1.5 V |
| Package Type | — | FBGA-1020 (FineLine BGA) |
| Package Dimensions | — | 33 x 33 mm |
| Ball Pitch | — | 1.00 mm |
| Lead-Free | — | Yes |
| Part Variant Suffix | — | ES (Engineering Sample) |
| Configuration Interface | — | JTAG (IEEE 1149.1) / Passive Serial |