EP1S40F780I6N vs EP1S30F780I6N Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EP1S40F780I6N sa pamamagitan ng Intel at EP1S30F780I6N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EP1S40F780I6N EP1S30F780I6N
Brand Intel Intel
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Obsolete Huling Pagbili
Series Stratix —
Logic Elements 41,250 32,470
Logic Array Blocks (LABs) 4,125 —
Total RAM Bits 3,423,744 3,317,184 bits
User I/O Pins 615 —
Core Voltage (VCCINT) 1.425 V to 1.575 V —
Number of I/O Banks [DATA_NEEDED: number of I/O banks] —
DSP Blocks 12 Yes (TriMatrix + DSP blocks per Stratix family)
PLLs [DATA_NEEDED: PLL count per Stratix handbook] —
Embedded Multipliers Yes (per DSP block) —
Configuration Method SRAM-based, volatile —
Packhaging 780-FBGA (29 x 29 mm, 1.0 mm pitch) —
Uri ng Pagpapasok Surface Mount Surface Mount
Temperature na Operasyon -40C to +100C (industrial) -40C to +100C (Industrial, I6)
Level ng MSL 3 3 (per typical FBGA moisture sensitivity)
Lead Free Yes —
Process Node 150 nm CMOS —
Tindminan RoHS Compliant —
Family — Stratix
User I/O Count — 597
Package Type — 780-BBGA, FCBGA (FineLine BGA)
Process Technology — 130 nm
Supply Voltage (Core) — [DATA_NEEDED: core voltage]
I/O Standards Supported — LVTTL, LVCMOS, LVDS, SSTL, HSTL
Lead-Free / RoHS — Lead-free terminal finish (N suffix), RoHS-compliant
Speed Grade — -6
JEDEC Code (e1) — e1 (Pb-free / matte tin)

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