EP1S60F1020C7 vs EP1S60F1020I6 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1S60F1020C7 sa pamamagitan ng Altera at EP1S60F1020I6 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EP1S60F1020I6 - Stratix 57K LEs FPGA 1020-BGA | Intel / Altera
EP1S60F1020I6 ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EP1S60F1020C7 | EP1S60F1020I6 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Huling Pagbili |
| Series | Stratix | — |
| Family | Stratix (EP1S60) | Stratix |
| Logic Elements | 57,120 | 57,120 |
| Total Memory Bits | 5,215,104 | — |
| Maximum User I/O | 773 | 773 |
| Packhaging | 1020-BBGA, FCBGA, 33 x 33 mm, 1.0 mm pitch | 1020-ball FC-FBGA (33 x 33 mm, 1 mm pitch) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (BGA) |
| Logic Family | CMOS | — |
| Temperature na Operasyon | 0C to +85C (Commercial) | — |
| Core Supply Voltage | 1.5 V | 1.5 V |
| Speed Grade | 7 | -6 |
| Logic Cells / Logic Blocks | 6,570 (per datasheet Section I nomenclature) | — |
| DSP Blocks | Embedded dedicated multiplier / adder blocks | — |
| PLLs | Up to 12 enhanced PLLs per die | — |
| Configuration Method | Serial or parallel with optional decompression | — |
| Level ng MSL | 3 (per BGA moisture-sensitivity norms) | 3 |
| Tindminan RoHS | Compliant (lead-free) | Compliant |
| Logic Array Blocks (LABs) | — | 6,570 |
| Embedded Memory Bits | — | 5,215,104 bits |
| Process Technology | — | 130 nm CMOS |
| Maximum Internal Frequency | — | 450 MHz |
| Operating Temperature (I-grade) | — | -40C to +100C (case) |
| Lead-Free | — | Yes |