EP1S60F1020I6 vs EP1S60F1020 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1S60F1020I6 sa pamamagitan ng Altera at EP1S60F1020 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EP1S60F1020I6 - Stratix 57K LEs FPGA 1020-BGA | Intel / Altera
EP1S60F1020I6 ⚠ Huling Pagbili
Pagsanggunian na paghahambing
| Parametro | EP1S60F1020I6 | EP1S60F1020 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Huling Pagbili | Huling Pagbili |
| Family | Stratix | Altera Stratix (EP1S) |
| Logic Elements | 57,120 | — |
| Logic Array Blocks (LABs) | 6,570 | 5,712 |
| Embedded Memory Bits | 5,215,104 bits | — |
| Maximum User I/O | 773 | — |
| Process Technology | 130 nm CMOS | 0.13 um CMOS |
| Core Supply Voltage | 1.5 V | — |
| Maximum Internal Frequency | 450 MHz | — |
| Packhaging | 1020-ball FC-FBGA (33 x 33 mm, 1 mm pitch) | 1020-BGA (FineLine FBGA) |
| Operating Temperature (I-grade) | -40C to +100C (case) | — |
| Speed Grade | -6 | — |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount (BGA) |
| Tindminan RoHS | Compliant | [DATA_NEEDED: verify per part suffix] |
| Lead-Free | Yes | — |
| Level ng MSL | 3 | [DATA_NEEDED: MSL rating] |
| Series | — | Stratix |
| Logic Elements (LEs) | — | 57,120 |
| Total RAM Bits | — | 5,215,104 |
| Embedded Multipliers (DSP Blocks) | — | [DATA_NEEDED: DSP block count] |
| User I/Os | — | 773 |
| PLLs | — | [DATA_NEEDED: PLL count, nominally 12 for Stratix EP1S60] |
| Core Voltage | — | 1.5 V |
| Operating Temperature (base part) | — | Commercial (0C to +85C) |
| Speed Grade (base part) | — | [DATA_NEEDED: trailing suffix needed for explicit grade] |
| I/O Standard Support | — | LVDS, LVPECL, SSTL, HSTL, PCI/PCI-X |
| Configuration Memory | — | SRAM-based, requires external configuration device |