EP1S80F1020C5 vs EP1S80F1020C6 Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EP1S80F1020C5 sa pamamagitan ng Altera at EP1S80F1020C6 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EP1S80F1020C5 EP1S80F1020C6
Brand Altera Intel
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Obsolete Obsolete
Family Stratix —
Logic Elements 80,640 79,040
Adaptive Logic Modules (ALMs) [DATA_NEEDED: ALM count] —
Logic Array Blocks (LABs) 7,904 —
Total RAM Bits 7,427,520 7,427,520
Embedded DSP Blocks 12 (9-bit × 9-bit multipliers) —
PLLs 12 —
Maximum User I/Os 773 —
I/O Banks 21 —
Packhaging 1020-ball FCBGA, 33 × 33 mm, 1 mm pitch —
Process Technology 0.13 µm CMOS 130 nm CMOS
Temperature na Operasyon 0 °C to 85 °C (Commercial) —
Speed Grade C5 C6
Volte ng Pagbibigay Stratix core/I/O multi-rail (per datasheet) —
Logic Family CMOS —
Tindminan RoHS [DATA_NEEDED: RoHS status] [DATA_NEEDED: rohs status]
Uri ng Pagpapasok Surface Mount (BGA) Surface Mount
Series — Stratix
Number of Logic Blocks / LABs — 9,191
Number of I/O Pins (max) — 773 user I/O
Number of Pins / Balls — 1020
Package Type — FC-FBGA (flip-chip fine-pitch BGA), 33 x 33 mm, 1.0 mm pitch
Core Supply Voltage (VCCINT) — 1.5 V nominal (1.425 V to 1.575 V)
Operating Temperature (Commercial) — 0 C to +85 C
Maximum Internal Clock Frequency — 450.05 MHz
Family Description — FPGA - Field Programmable Gate Array
Embedded Memory — TriMatrix (three block sizes, true/simple dual-port)
Configuration Interface — JTAG (IEEE 1149.1) + serial/parallel configuration device
Design Tool — Quartus II (legacy, Stratix family)
Level ng Sensitivity sa Asid ng Moisture (MSL) — [DATA_NEEDED: MSL rating]

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