EP1S80F1020C5N vs EP1S80F1020C6 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1S80F1020C5N sa pamamagitan ng Intel at EP1S80F1020C6 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP1S80F1020C5N | EP1S80F1020C6 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Tapus ng Buhay | Obsolete |
| Product Type | Field Programmable Gate Array (FPGA) | — |
| Device Family | Stratix | — |
| Logic Technology | CMOS | — |
| Logic Elements | 79,040 | 79,040 |
| Logic Cells | 9,191 | — |
| Logic Array Blocks | 7,904 | — |
| User I/O Pins | 773 I/O | — |
| Total Package Pins or Balls | 1,020 | — |
| Package Type | FBGA-1020 | FC-FBGA (flip-chip fine-pitch BGA), 33 x 33 mm, 1.0 mm pitch |
| Package Dimensions | 33 mm x 33 mm | — |
| Ball Pitch | 1 mm | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Temperature na Operasyon | 0 °C to 85 °C | — |
| Volte ng Pagbibigay | [DATA_NEEDED: operating supply voltage] | — |
| Speed Grade | C5 | C6 |
| Tindminan RoHS | unknown | [DATA_NEEDED: rohs status] |
| REACH Status | unknown | — |
| AEC-Q100 Qualification | not_applicable | — |
| Embedded Memory Capacity | [DATA_NEEDED: embedded memory capacity] | — |
| Phase-Locked Loops | [DATA_NEEDED: PLL count] | — |
| Transceiver Count | [DATA_NEEDED: transceiver count] | — |
| Series | — | Stratix |
| Total RAM Bits | — | 7,427,520 |
| Number of Logic Blocks / LABs | — | 9,191 |
| Number of I/O Pins (max) | — | 773 user I/O |
| Number of Pins / Balls | — | 1020 |
| Process Technology | — | 130 nm CMOS |
| Core Supply Voltage (VCCINT) | — | 1.5 V nominal (1.425 V to 1.575 V) |
| Operating Temperature (Commercial) | — | 0 C to +85 C |
| Maximum Internal Clock Frequency | — | 450.05 MHz |
| Family Description | — | FPGA - Field Programmable Gate Array |
| Embedded Memory | — | TriMatrix (three block sizes, true/simple dual-port) |
| Configuration Interface | — | JTAG (IEEE 1149.1) + serial/parallel configuration device |
| Design Tool | — | Quartus II (legacy, Stratix family) |
| Level ng Sensitivity sa Asid ng Moisture (MSL) | — | [DATA_NEEDED: MSL rating] |