EP1S80F1020C7 vs EP1S80F1020C6N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1S80F1020C7 sa pamamagitan ng Altera at EP1S80F1020C6N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EP1S80F1020C6N - Stratix 79,040 Logic Elements FPGA | Intel (Altera) | 1020-BGA
EP1S80F1020C6N NrndPagsanggunian na paghahambing
| Parametro | EP1S80F1020C7 | EP1S80F1020C6N |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | NRND |
| Series | Stratix | Stratix |
| Logic Elements | 79,040 | — |
| System Gates (typical) | 7,427,520 | — |
| Logic Array Blocks (LABs) | 7,904 | — |
| User I/O Pins | 773 | — |
| Total Package Pins | 1020 (ball) | — |
| Package Type | FBGA-1020 (33 x 33 mm, 1 mm pitch) | — |
| Core Supply Voltage (VCCINT) | 1.425 V to 1.575 V | — |
| Temperature na Operasyon | 0 C to 85 C (Commercial) | 0C to 85C (Commercial) |
| Logic Family | CMOS, SRAM-based configuration | — |
| Process Technology | 1.5 V, 0.13 um CMOS | 130 nm CMOS |
| Configuration Modes | Passive Serial (PS), Fast Passive Parallel (FPP), JTAG | — |
| PLLs | 12 (per datasheet family) | — |
| Memory | TriMatrix embedded SRAM blocks | — |
| DSP Blocks | Dedicated hardware multipliers/accumulators | — |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount (SMT) |
| Tindminan RoHS | Compliant (lead-free FBGA) | [DATA_NEEDED: RoHS status] |
| Manufacturer | — | Intel (formerly Altera) |
| Logic Cells / Logic Elements | — | 79,040 |
| Equivalent Gate Count | — | 7,427,520 |
| Number of LABs/CLBs | — | 7904 |
| Number of User I/Os | — | 773 |
| Packhaging | — | 1020-ball FBGA (FC-FBGA), 33 x 33 mm, 1 mm pitch |
| Core Supply Voltage | — | 1.5 V |
| Speed Grade | — | C6 |
| Operating Frequency (typ.) | — | 450 MHz (Stratix family max) |
| Level ng Sensitivity sa Asid ng Moisture (MSL) | — | [DATA_NEEDED: MSL level] |
| Configuration Memory Interface | — | Serial (EPCS) or parallel - per Stratix family |