EP1SGX25DF1020C4 vs EP1SGX25DF1020C5ES Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1SGX25DF1020C4 sa pamamagitan ng Intel at EP1SGX25DF1020C5ES sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EP1SGX25DF1020C5ES - Stratix GX FPGA, 25K LE, FBGA-1020 | Altera
EP1SGX25DF1020C5ES ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EP1SGX25DF1020C4 | EP1SGX25DF1020C5ES |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Huling Pagbili |
| Family | Stratix GX | — |
| Series | EP1SGX25 | — |
| Logic Elements | 25,660 | — |
| Embedded Memory | 1,944 Kbit | 1,944,576 bits |
| DSP Blocks | 80 (18x18-bit multipliers) | — |
| Transceiver Channels | 20 (up to 3.125 Gbps) | — |
| Core Voltage | 1.5 V | — |
| Speed Grade | C4 | C5 |
| Temperature na Operasyon | 0C to +85C (commercial) | 0 °C to 85 °C (commercial) |
| Packhaging | 1020-ball FineLine BGA (FBGA) | — |
| Process | 0.13 um CMOS SRAM | — |
| I/O Standards | LVTTL, LVCMOS, LVDS, SSTL, HSTL | — |
| PLLs | Yes (clock management) | — |
| Configuration | JTAG, Passive Serial, Active Serial | — |
| Tindminan RoHS | Compliant | — |
| Uri ng Pagpapasok | Surface Mount (BGA) | — |
| Device Family | — | Stratix GX |
| Logic Family | — | CMOS |
| Logic Elements (LEs) | — | 25,660 |
| Configurable Logic Blocks (CLBs) | — | 2,566 |
| Process Technology | — | 130 nm |
| Core Supply Voltage | — | 1.5 V |
| Package Type | — | FBGA-1020 (FineLine BGA) |
| Package Dimensions | — | 33 x 33 mm |
| Ball Pitch | — | 1.00 mm |
| Lead-Free | — | Yes |
| Part Variant Suffix | — | ES (Engineering Sample) |
| Configuration Interface | — | JTAG (IEEE 1149.1) / Passive Serial |