EP1SGX25DF1020C6B vs EP1SGX25DF1020C5ES Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1SGX25DF1020C6B sa pamamagitan ng Altera at EP1SGX25DF1020C5ES sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EP1SGX25DF1020C5ES - Stratix GX FPGA, 25K LE, FBGA-1020 | Altera
EP1SGX25DF1020C5ES ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EP1SGX25DF1020C6B | EP1SGX25DF1020C5ES |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Huling Pagbili |
| Series | Stratix GX | — |
| Family | EP1SGX25 | — |
| Logic Elements | 25,660 | — |
| Total Memory Bits | 1,944,576 | — |
| User I/O Count | 607 | — |
| Packhaging | 1020-BBGA (33 × 33 mm, 1.0 mm pitch) | — |
| Supply Voltage (Core) | 1.5 V | — |
| Temperature na Operasyon | 0 °C to 85 °C (Commercial) | 0 °C to 85 °C (commercial) |
| Speed Grade | C6 | C5 |
| Uri ng Pagpapasok | Surface Mount (BGA) | — |
| Level ng MSL | [DATA_NEEDED: MSL rating] | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | — |
| Lead-Free | Yes (per DigiChip package note) | Yes |
| Transceivers | Embedded high-speed serial transceivers (multi-gigabit) | — |
| PLLs | On-chip phase-locked loops for clock management | — |
| DSP Blocks | Hardware multipliers / DSP blocks | — |
| External Memory Support | DDR, DDR2, SDR, QDR, QDRII SRAM | — |
| Hard IP | PCI Express (per Stratix GX family) | — |
| Device Family | — | Stratix GX |
| Logic Family | — | CMOS |
| Logic Elements (LEs) | — | 25,660 |
| Configurable Logic Blocks (CLBs) | — | 2,566 |
| Embedded Memory | — | 1,944,576 bits |
| Process Technology | — | 130 nm |
| Core Supply Voltage | — | 1.5 V |
| Package Type | — | FBGA-1020 (FineLine BGA) |
| Package Dimensions | — | 33 x 33 mm |
| Ball Pitch | — | 1.00 mm |
| Part Variant Suffix | — | ES (Engineering Sample) |
| Configuration Interface | — | JTAG (IEEE 1149.1) / Passive Serial |