EP1SGX25DF672C6 vs EP1S25F672C6 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1SGX25DF672C6 sa pamamagitan ng Intel at EP1S25F672C6 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP1SGX25DF672C6 | EP1S25F672C6 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Huling Pagbili |
| Series | Stratix GX | — |
| Logic Elements | 25,660 LE | 25,660 |
| Number of LABs | 2,566 | — |
| Total RAM Bits | 1,944,576 bits | 1,944,576 |
| User I/O Count | 455 | — |
| Number of Transceivers | 6 channels (per Stratix GX family) | — |
| Max Transceiver Data Rate | 3.125 Gbps | — |
| Core Voltage | 1.5 V | 1.5 V |
| Temperature na Operasyon | 0C to +85C (commercial) | 0C to +85C (Commercial) |
| Packhaging | 672-BBGA FineLine BGA | 672-BBGA (FineLine BGA, 35 x 35 mm, 1.27 mm pitch) |
| Package Dimensions | 33 x 33 mm | — |
| Ball Pitch | 1.0 mm | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Lead-Free / RoHS | Lead-Free (per FBGA suffix family) | — |
| Process Technology | CMOS | 130 nm CMOS |
| Family | — | Stratix |
| Configurable Logic Blocks (CLBs) | — | 2,852 |
| DSP Blocks | — | 14 |
| Maximum User I/O | — | 473 |
| Logic Family | — | CMOS |
| Speed Grade | — | 6 |
| Configuration Method | — | JTAG, Passive Serial, Fast Passive Parallel, Active Serial |
| Tindminan RoHS | — | Compliant |
| PLL Count (Maximum) | — | 12 (including enhanced PLLs) |