EP1SGX25DF672I5N vs EP1SGX25DF672I5 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1SGX25DF672I5N sa pamamagitan ng Intel at EP1SGX25DF672I5 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EP1SGX25DF672I5N - Stratix GX FPGA, 25.6K LE, 3.1875Gbps SERDES
EP1SGX25DF672I5N ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EP1SGX25DF672I5N | EP1SGX25DF672I5 |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Huling Pagbili | NRND |
| Family | Stratix GX | Stratix GX |
| Logic Elements | 25,660 | 25,660 |
| Logic Cells (CLBs) | 2,566 | — |
| Process Technology | 130 nm CMOS | 130 nm CMOS |
| Core Supply Voltage | 1.5 V | 1.5 V |
| High-Speed Transceiver Channels | 4 to 20 (CDR/SERDES) | — |
| Max Transceiver Data Rate | 3.1875 Gbps | — |
| Packhaging | 672-ball FC-FBGA | 672-ball FC-FBGA (Flip-Chip Fine-pitch BGA) |
| Package Body Size | 33 x 33 mm | — |
| Ball Pitch | 1.0 mm | — |
| Temperature na Operasyon | -40C to +85C (Industrial) | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Lead-Free | Yes | [DATA_NEEDED: lead_free_status] |
| Tindminan RoHS | Compliant | [DATA_NEEDED: rohs_status] |
| Logic Family | CMOS (SRAM-based FPGA) | — |
| Total I/O Pins | [DATA_NEEDED: total user I/O pin count] | — |
| Embedded Memory | [DATA_NEEDED: TriMatrix memory block count] | — |
| Configurable Logic Blocks (CLBs) | — | 2,566 |
| Embedded Memory Bits | — | 1,944,576 |
| Operating Temperature Grade | — | Military (-55C to +125C) |
| Form of Terminal | — | Ball |
| Package Code | — | BGA |
| Package Shape | — | Square |
| Number of Terminals | — | 672 |