EP1SGX25DF672I5N vs EP1SGX25DF672I7N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1SGX25DF672I5N sa pamamagitan ng Intel at EP1SGX25DF672I7N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EP1SGX25DF672I5N - Stratix GX FPGA, 25.6K LE, 3.1875Gbps SERDES
EP1SGX25DF672I5N ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EP1SGX25DF672I5N | EP1SGX25DF672I7N |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Huling Pagbili | Obsolete |
| Family | Stratix GX | Stratix GX |
| Logic Elements | 25,660 | 25,660 |
| Logic Cells (CLBs) | 2,566 | — |
| Process Technology | 130 nm CMOS | 130 nm CMOS |
| Core Supply Voltage | 1.5 V | — |
| High-Speed Transceiver Channels | 4 to 20 (CDR/SERDES) | 4 |
| Max Transceiver Data Rate | 3.1875 Gbps | — |
| Packhaging | 672-ball FC-FBGA | 672-ball FineLine BGA (FC-FBGA), 33 × 33 mm, 1 mm pitch |
| Package Body Size | 33 x 33 mm | — |
| Ball Pitch | 1.0 mm | — |
| Temperature na Operasyon | -40C to +85C (Industrial) | 0 °C to 85 °C (industrial) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (BGA) |
| Lead-Free | Yes | Yes |
| Tindminan RoHS | Compliant | [DATA_NEEDED: rohs status] |
| Logic Family | CMOS (SRAM-based FPGA) | CMOS |
| Total I/O Pins | [DATA_NEEDED: total user I/O pin count] | — |
| Embedded Memory | [DATA_NEEDED: TriMatrix memory block count] | — |
| CLBs | — | 2,566 |
| Maximum Operating Frequency | — | 4385.97 MHz (logic); 4.7 MHz (combinatorial CLB delay rating) |
| Combinatorial Delay (CLB) | — | 9.48 ns max |
| Transceiver Data Rate | — | 500 Mbps to 3.1875 Gbps per channel |
| Core Supply Voltage (VCCINT) | — | 1.5 V |
| Supply Voltage Range | — | 1.425 V to 1.575 V |
| Terminal Form | — | Ball (BGA) |
| Number of Terminals | — | 672 |