EP1SGX40DF1020I7N vs EP1S40F1020I6N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1SGX40DF1020I7N sa pamamagitan ng Intel at EP1S40F1020I6N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP1SGX40DF1020I7N | EP1S40F1020I6N |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | Stratix GX | Stratix |
| Device Model | EP1SGX40 | — |
| Logic Cells | 41,250 | — |
| Configurable Logic Blocks (CLBs) | 4,125 | — |
| Logic Family | CMOS | — |
| Process Technology | 130 nm | — |
| Nominal Supply Voltage | 1.5 V | — |
| Supply Voltage Range | 1.425 V to 1.575 V | — |
| Temperature na Operasyon | 0 C to 85 C (commercial) | 0 C to 85 C (commercial) |
| Package Type | FC-FBGA, 33 x 33 mm, 1 mm pitch | FC-FBGA |
| Number of Pins / Balls | 1020 | — |
| Package Code | BGA | — |
| Terminal Form | Ball | — |
| Package Shape | Square | — |
| Maksimum na Taktiko ng Oras | 4385.97 MHz | — |
| Combinatorial Delay | [DATA_NEEDED: tPD] | — |
| Configuration Modes | JTAG, Passive Serial, Fast Passive Parallel | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Tindminan RoHS | [DATA_NEEDED: RoHS compliance] | Unknown - pre-RoHS Altera-era part |
| Series | — | Stratix I |
| Logic Elements (LE) | — | 41,250 |
| Logic Array Blocks (LABs) | — | 4,125 |
| Total Memory Bits | — | 3,423,744 |
| User I/Os | — | 773 |
| Core Voltage | — | 1.5 V |
| Volte ng Pagbibigay | — | 1.5 V |
| Package Pins/Balls | — | 1020 |
| Package Dimensions | — | 33 x 33 mm |
| Ball Pitch | — | 1.0 mm |
| Level ng MSL | — | [DATA_NEEDED: MSL level] |