EP1SGX40DF1020I7N vs EP1SGX40DF1020C7N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1SGX40DF1020I7N sa pamamagitan ng Intel at EP1SGX40DF1020C7N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EP1SGX40DF1020C7N - 41,250-Cell Stratix GX FPGA | Altera/Intel
EP1SGX40DF1020C7N ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EP1SGX40DF1020I7N | EP1SGX40DF1020C7N |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Huling Pagbili |
| Family | Stratix GX | Stratix GX |
| Device Model | EP1SGX40 | — |
| Logic Cells | 41,250 | 41,250 |
| Configurable Logic Blocks (CLBs) | 4,125 | 4,697 |
| Logic Family | CMOS | CMOS |
| Process Technology | 130 nm | 130 nm CMOS |
| Nominal Supply Voltage | 1.5 V | — |
| Supply Voltage Range | 1.425 V to 1.575 V | — |
| Temperature na Operasyon | 0 C to 85 C (commercial) | 0C to +85C (commercial) |
| Package Type | FC-FBGA, 33 x 33 mm, 1 mm pitch | — |
| Number of Pins / Balls | 1020 | — |
| Package Code | BGA | — |
| Terminal Form | Ball | — |
| Package Shape | Square | — |
| Maksimum na Taktiko ng Oras | 4385.97 MHz | — |
| Combinatorial Delay | [DATA_NEEDED: tPD] | — |
| Configuration Modes | JTAG, Passive Serial, Fast Passive Parallel | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (BGA) |
| Tindminan RoHS | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS status] |
| User I/Os | — | 624 |
| Packhaging | — | 1020-ball FC-FBGA, 33x33 mm, 1.0 mm pitch |
| Core Voltage | — | 1.5 V |
| Uri ng Memory | — | SRAM-based configuration |
| Configuration Method | — | Serial/Parallel via Quartus II |
| Level ng MSL | — | [DATA_NEEDED: MSL rating] |
| Tray Standard Quantity | — | [DATA_NEEDED: tray qty] |