EP1SGX40FF1020C5 vs EP1SGX40F1020C6 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1SGX40FF1020C5 sa pamamagitan ng Intel at EP1SGX40F1020C6 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP1SGX40FF1020C5 | EP1SGX40F1020C6 |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Obsolete |
| Family | Stratix GX | Stratix GX |
| Logic Elements | 41,250 | 41,250 |
| Configurable Logic Blocks (CLBs) | 4,125 | 4,125 |
| Total RAM Bits | 3,423,744 bits | 3,423,744 |
| Number of I/O Banks | [DATA_NEEDED: number of I/O banks] | — |
| Transceiver Channels | 20 (up to 3.125 Gbps) | — |
| Core Voltage | 1.5 V (1.425 V to 1.575 V) | — |
| Temperature na Operasyon | 0C to +85C (commercial, -C5 speed grade) | 0 C to 85 C (commercial) |
| Packhaging | 1020-ball FCBGA (FF), 1.00 mm pitch, 33 x 33 mm | — |
| Seated Height | 3.50 mm | — |
| Process Technology | CMOS, 0.13 um | — |
| Maximum User I/O | [DATA_NEEDED: max user I/O count] | — |
| DSP Blocks | [DATA_NEEDED: DSP block count] | — |
| PLLs | [DATA_NEEDED: PLL count] | — |
| Uri ng Pagpapasok | Surface Mount | — |
| Level ng MSL | [DATA_NEEDED: MSL rating] | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Series | — | EP1SGX40 |
| Number of I/O Pins | — | [DATA_NEEDED: I/O pin count] |
| Number of Transceivers | — | [DATA_NEEDED: transceiver count] |
| Max Transceiver Data Rate | — | 3.1875 Gbps |
| Core Voltage (VCCINT) | — | 1.5 V |
| Logic Family | — | CMOS (SRAM-based LUT) |
| Package Type | — | 1020-ball FBGA (FineLine BGA) |
| Package Dimensions | — | 33 x 33 mm |
| Ball Pitch | — | 1.00 mm |
| Configuration Method | — | SRAM-based (volatile, requires boot device) |
| Speed Grade | — | C6 |