EP1SGX40FF1020I6 vs EP1SGX40DF1020I6 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1SGX40FF1020I6 sa pamamagitan ng Altera at EP1SGX40DF1020I6 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP1SGX40FF1020I6 | EP1SGX40DF1020I6 |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Series | Stratix® GX | — |
| Family | EP1SGX40 | Stratix GX |
| Logic Elements | 41,250 | 41,250 |
| Embedded Memory | 3,423,744 bits | — |
| User I/Os | 624 | — |
| Logic Array Blocks (LABs) | 41,250 | — |
| Packhaging | 1020-ball FineLine BGA | 1020-ball FC-FBGA |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Core Voltage (VCCINT) | 1.5 V ±0.15 V | — |
| Temperature na Operasyon | -40 °C to +100 °C (Industrial) | — |
| Temperature Grade | I (Industrial) | — |
| Transceiver Channels | Up to 20 channels | — |
| Max Transceiver Data Rate | 3.1875 Gbps | — |
| Transceiver Technology | CDR with embedded SERDES | — |
| Process Technology | CMOS | 130 nm CMOS |
| Configuration | SRAM-based LUT | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance status] |
| Level ng MSL | [DATA_NEEDED: MSL level] | [DATA_NEEDED: moisture sensitivity level] |
| Configurable Logic Blocks (CLBs) | — | 4,125 |
| Embedded Memory Bits | — | 3,423,744 |
| Maximum User I/Os | — | 624 |
| Combinatorial Delay (CLB max) | — | 8.245 ns |
| Core Voltage | — | 1.5 V |
| Maximum Operating Frequency | — | [DATA_NEEDED: actual frequency in MHz] |
| Package Code | — | BGA |
| Ball Pitch | — | 1.00 mm |
| Operating Temperature Grade | — | Industrial (I6) |