EP1SGX40FF1020I6 vs EP1SGX40FF1020C6 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1SGX40FF1020I6 sa pamamagitan ng Altera at EP1SGX40FF1020C6 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP1SGX40FF1020I6 | EP1SGX40FF1020C6 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Series | Stratix® GX | EP1SGX40 |
| Family | EP1SGX40 | Stratix GX |
| Logic Elements | 41,250 | — |
| Embedded Memory | 3,423,744 bits | 3,423,744 bits |
| User I/Os | 624 | — |
| Logic Array Blocks (LABs) | 41,250 | — |
| Packhaging | 1020-ball FineLine BGA | 1020-ball FBGA (PBGA), 1.00 mm pitch, 33 x 33 mm |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Core Voltage (VCCINT) | 1.5 V ±0.15 V | — |
| Temperature na Operasyon | -40 °C to +100 °C (Industrial) | 0 C to 85 C (Commercial) |
| Temperature Grade | I (Industrial) | — |
| Transceiver Channels | Up to 20 channels | — |
| Max Transceiver Data Rate | 3.1875 Gbps | — |
| Transceiver Technology | CDR with embedded SERDES | — |
| Process Technology | CMOS | — |
| Configuration | SRAM-based LUT | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | Compliant |
| Level ng MSL | [DATA_NEEDED: MSL level] | [DATA_NEEDED: MSL Level] |
| Logic Elements (LEs) | — | 41,250 |
| Configurable Logic Blocks (CLBs) | — | 4,125 |
| Logic Family | — | CMOS, SRAM-based LUT |
| Core Supply Voltage | — | 1.5 V |
| Speed Grade | — | C6 |
| High-Speed Transceivers | — | Up to 20 channels (Stratix GX) |
| Configuration Method | — | SRAM-based, external configuration device required |