EP1SGX40GF1020C7L vs EP1SGX40DF1020C7 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1SGX40GF1020C7L sa pamamagitan ng Altera at EP1SGX40DF1020C7 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EP1SGX40GF1020C7L - 41,250 LE Stratix GX FPGA, 1020-BGA | Intel / Altera
EP1SGX40GF1020C7L ObsoletePagsanggunian na paghahambing
| Parametro | EP1SGX40GF1020C7L | EP1SGX40DF1020C7 |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | Stratix GX | Stratix |
| Logic Elements (LE) | 41,250 | — |
| Logic Array Blocks (LABs) | 4,125 | — |
| User I/O Count | 624 | — |
| Packhaging | 1020-ball FC-FBGA | — |
| Process Technology | 130 nm CMOS | 130 nm CMOS |
| Core Voltage | 1.5 V | — |
| Multi-Gigabit Transceiver Data Rate | 500 Mbps to 3.1875 Gbps | — |
| Transceiver Input Reference Frequency | 25 MHz to 650 MHz | — |
| PMA Multiplication Factor (W) | 2, 4, 5, 8, 10, 16, 20 | — |
| PPM Detector Bandwidth | 125 / 250 / 500 / 1000 ppm | — |
| Speed Grade | -7 (commercial, L suffix) | C7 |
| PLLs | 4 | — |
| Memory Architecture | TriMatrix (M512, M4K, M-RAM) | — |
| Design Tool | Quartus II | — |
| Series | — | Stratix GX |
| Logic Elements (LEs) | — | 41,250 |
| Number of LABs/CLBs | — | 4,125 |
| Total RAM Bits | — | [DATA_NEEDED: total RAM bits] |
| Number of I/O | — | 624 |
| Number of Gates | — | [DATA_NEEDED: gate count] |
| Volte ng Pagbibigay | — | 1.425 V to 1.575 V (1.5 V nominal) |
| Temperature na Operasyon | — | 0 C to 85 C |
| Package Type | — | FC-FBGA-1020 |
| Package Dimensions | — | 33 x 33 mm, 1.0 mm pitch |
| Uri ng Pagpapasok | — | Surface Mount (BGA) |
| Logic Family | — | CMOS |
| Tindminan RoHS | — | [DATA_NEEDED: RoHS status] |
| Lead Free | — | [DATA_NEEDED: lead-free status] |
| Level ng MSL | — | [DATA_NEEDED: MSL level] |