EP1SGX40GF800I5N vs EP1SGX40GF800C5N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1SGX40GF800I5N sa pamamagitan ng Altera at EP1SGX40GF800C5N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EP1SGX40GF800I5N - Stratix GX 40K LEs FPGA | Intel / Altera | 800-pin FBGA
EP1SGX40GF800I5N ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EP1SGX40GF800I5N | EP1SGX40GF800C5N |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Huling Pagbili | Obsolete |
| Family | Stratix GX | Stratix GX |
| Logic Elements | 41,250 LEs | 41,250 |
| Equivalent LEs | 41,250 | — |
| Embedded Memory | 3.42 Mbit | — |
| Total RAM Bits | 3,423,744 bits | 3,432,192 (3.4 Mbit) |
| Multi-Gigabit Transceivers | 20 channels | — |
| Maximum User I/O | 376 | — |
| I/O Banks | 11 | — |
| Packhaging | 800-pin FBGA (FineLine BGA) | 780-pin FineLine BGA |
| Speed Grade | -5 (faster) | -5 (slower than -6/-7) |
| Operating Temperature (Junction) | -40C to +100C (industrial) | — |
| Process Node | 130 nm | — |
| Supply Voltage - Core (VCCINT) | 1.5 V | — |
| Configuration Mode | SRAM, JTAG, EPC16/EPCS | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: explicit RoHS statement for this specific MPN] |
| DSP Blocks | — | 14 |
| Embedded Multipliers (9-bit equivalent) | — | 56 |
| Transceiver Channels | — | 20 (up to 3.1875 Gbps per channel) |
| Maximum User I/O Pins | — | [DATA_NEEDED: max user I/O count for 780-pin BGA] |
| PLLs | — | 24 |
| Clock Networks | — | 8 phase-locked |
| Temperature na Operasyon | — | Commercial (0C to +85C) |
| Core Voltage | — | 1.5 V |
| Process Technology | — | 0.13 µm SRAM |
| Configuration Method | — | EPC enhanced configuration devices or JTAG |
| Lead-Free | — | [DATA_NEEDED: lead-free finish] |