EP1SGX40GF800I7 vs EP1SGX40GF800C7N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1SGX40GF800I7 sa pamamagitan ng Altera at EP1SGX40GF800C7N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EP1SGX40GF800C7N - Stratix GX FPGA, 41.25K LE, 800-BGA | Intel / Altera
EP1SGX40GF800C7N ObsoletePagsanggunian na paghahambing
| Parametro | EP1SGX40GF800I7 | EP1SGX40GF800C7N |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | Stratix GX | Stratix GX |
| Series | Stratix GX FPGA | — |
| Logic Elements (LE) | 41,250 | — |
| Embedded Memory | 3,423,744 bits | — |
| Embedded Multipliers (18x18) | 624 | — |
| High-Speed Transceivers (SERDES) | 20 channels, up to 3.125 Gbps | — |
| Packhaging | 800-ball FineLine BGA (GF) | 800-ball FineLine BGA (FBGA-800) |
| Temperature na Operasyon | -40C to +100C (industrial, I grade) | — |
| Speed Grade | -7 | 7 (commercial, fastest) |
| PLL Count | 12 (logic + transceiver) | — |
| User I/O Banks | [DATA_NEEDED: number of user I/O banks and pins] | — |
| Maximum User I/O | [DATA_NEEDED: max user I/O count] | — |
| Supply Voltage Core | [DATA_NEEDED: VCCINT nominal] | — |
| Configuration Method | Enhanced configuration device / Passive serial / JTAG | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS compliance status] | — |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Level ng MSL | [DATA_NEEDED: moisture sensitivity level] | — |
| Transceiver Protocols Supported | PCI Express, Gigabit Ethernet, XAUI, Serial RapidIO, Fibre Channel | — |
| Logic Elements | — | 41,250 |
| Embedded Memory Bits | — | 3,423,744 bits |
| DSP Blocks | — | 624 |
| Multi-Gigabit Transceivers | — | 20 channels, up to 3.1875 Gbps |
| PLLs | — | 4 |
| Maximum User I/O Pins | — | [DATA_NEEDED: max user I/O count] |
| Process Technology | — | 130 nm CMOS |
| Core Voltage | — | 1.5 V |
| I/O Voltage | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V (LVTTL/LVCMOS/LVDS) |
| Temperature ng Junction na Operasyon | — | 0C to +85C |
| Configuration Mode | — | Passive Serial / Fast Passive Parallel / Passive Parallel Asynchronous / JTAG |
| Memory Interfaces Supported | — | DDR, DDR2, QDR, RLDRAM |
| Uri ng Pagpapasok | — | Surface Mount (BGA) |