EP20K1000EBC652-2X vs EP20K1000EBI652-2 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K1000EBC652-2X sa pamamagitan ng Altera at EP20K1000EBI652-2 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EP20K1000EBC652-2X - 1M Gate APEX-20KE FPGA, 488 I/O, 652-BGA | Altera (Intel)
EP20K1000EBC652-2X NrndAltera
EP20K1000EBI652-2 - APEX 20KE 1M Gates FPGA, BGA-652 | Intel / Altera
EP20K1000EBI652-2 ObsoletePagsanggunian na paghahambing
| Parametro | EP20K1000EBC652-2X | EP20K1000EBI652-2 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Obsolete |
| Family | APEX-20KE | — |
| Device Logic Elements | 38,400 | — |
| Typical Gates | 1,000,000 system gates | 1,000,000 |
| Embedded Memory Bits | 327,680 bits | — |
| User I/O Pins | 488 | — |
| Maximum User I/O | 488 | 488 |
| Propagation Delay | 1.6 ns | 1.6 ns |
| Internal Maximum Frequency | 350 MHz | — |
| Logic Blocks / Macros | 2,560 macros | — |
| PLLs | 4 | — |
| Core Voltage | 1.8 V | — |
| Process Technology | 0.22 µm (some sources 0.15 µm) all-layer copper-metal CMOS | 0.18 micrometer CMOS, all-layer copper |
| Packhaging | 652-pin FCBGA / PBGA (45 x 45 mm, 1.27 mm pitch) | BGA-652 (FineLine BGA, 45 x 45 mm) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (BGA) |
| Temperature na Operasyon | 0 °C to +85 °C (commercial) | — |
| Configuration Interface | JTAG (IEEE 1149.1), Passive Serial, Altera configuration | — |
| Tindminan RoHS | Compliant | [DATA_NEEDED: RoHS compliance] |
| Device Family | — | APEX 20KE |
| Logic Elements | — | 38,400 |
| Ball Pitch | — | 1.27 mm |
| Speed Grade | — | -2 |
| Hanay ng Temperature na Operasyon | — | Industrial -40C to +100C |
| Supply Voltage (Core) | — | 1.8 V |
| Embedded System Block Memory | — | [DATA_NEEDED: ESB memory size] |
| Embedded Multiplier/Accumulator Blocks | — | [DATA_NEEDED: number of multiplier blocks] |
| Phase-Locked Loops (PLLs) | — | 4 |
| Internal Operating Frequency | — | 350 MHz |
| Configuration Modes | — | PS, PPS, PPA, JTAG |
| Level ng MSL | — | [DATA_NEEDED: MSL rating] |