EP20K100CB356C7ES vs EP20K100CB356C7 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K100CB356C7ES sa pamamagitan ng Intel at EP20K100CB356C7 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EP20K100CB356C7 - APEX20K FPGA 100K Gates 252 I/O 356-BGA | Intel
EP20K100CB356C7 ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EP20K100CB356C7ES | EP20K100CB356C7 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Huling Pagbili |
| Family | APEX20K | — |
| Logic Elements | 4,160 | — |
| Typical Gates | 100,000 | 100,000 |
| Maximum System Gates | 263,000 | — |
| Embedded Memory (RAM bits) | 53,248 | — |
| User I/O Pins | 252 | 252 |
| Packhaging | 356-BGA | 356-LBGA |
| Speed Grade | C7 | C7 |
| Core Voltage | 1.8 V | 2.5 V |
| I/O Voltage Compatibility | 2.5 V / 3.3 V | — |
| Configuration Method | JTAG / Passive Serial | — |
| Temperature na Operasyon | [DATA_NEEDED: operating temperature range] | Commercial grade |
| Process Technology | SRAM-based CMOS | 0.18 μm CMOS |
| Uri ng Pagpapasok | Surface Mount (BGA) | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS compliance status] |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Manufacturer | — | Intel (formerly Altera) |
| Series | — | APEX20K |
| Maximum Logic Elements | — | 53,248 |
| Embedded Memory (Bits) | — | 53,248 |
| Number of PLLs | — | 4 |
| I/O Standards Supported | — | 1.8V, 2.5V, 3.3V, 5V (MultiVolt) |
| Programming Interface | — | IEEE 1149.1 JTAG |