EP20K100CB356C7ES vs EP20K100CB356C8 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K100CB356C7ES sa pamamagitan ng Intel at EP20K100CB356C8 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP20K100CB356C7ES | EP20K100CB356C8 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | NRND |
| Family | APEX20K | APEX 20K |
| Logic Elements | 4,160 | 4,160 |
| Typical Gates | 100,000 | 100,000 |
| Maximum System Gates | 263,000 | — |
| Embedded Memory (RAM bits) | 53,248 | — |
| User I/O Pins | 252 | — |
| Packhaging | 356-BGA | 356-ball LBGA |
| Speed Grade | C7 | C8 |
| Core Voltage | 1.8 V | — |
| I/O Voltage Compatibility | 2.5 V / 3.3 V | — |
| Configuration Method | JTAG / Passive Serial | — |
| Temperature na Operasyon | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: operating temperature range] |
| Process Technology | SRAM-based CMOS | 0.18 µm CMOS |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount (BGA) |
| Tindminan RoHS | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS status] |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Maximum User I/O | — | 252 |
| Embedded Array Blocks (EABs) | — | 12 |
| Embedded Memory (EAB-based) | — | 24 Kbits |
| Phase-Locked Loops (PLLs) | — | 4 |
| Core Supply Voltage (VCCINT) | — | 1.8 V |
| I/O Supply Voltage (VCCIO) | — | 1.8 V / 2.5 V / 3.3 V (MultiVolt) |
| Configuration Modes | — | PS / PPS / PPA / JTAG (IEEE 1532) |
| Level ng MSL | — | [DATA_NEEDED: MSL level] |