EP20K100CB356C8 vs EP20K100CB356C7 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K100CB356C8 sa pamamagitan ng Intel at EP20K100CB356C7 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EP20K100CB356C7 - APEX20K FPGA 100K Gates 252 I/O 356-BGA | Intel
EP20K100CB356C7 ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EP20K100CB356C8 | EP20K100CB356C7 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Huling Pagbili |
| Family | APEX 20K | — |
| Logic Elements | 4,160 | — |
| Typical Gates | 100,000 | 100,000 |
| Maximum User I/O | 252 | — |
| Embedded Array Blocks (EABs) | 12 | — |
| Embedded Memory (EAB-based) | 24 Kbits | — |
| Phase-Locked Loops (PLLs) | 4 | — |
| Core Supply Voltage (VCCINT) | 1.8 V | — |
| I/O Supply Voltage (VCCIO) | 1.8 V / 2.5 V / 3.3 V (MultiVolt) | — |
| Temperature na Operasyon | [DATA_NEEDED: operating temperature range] | Commercial grade |
| Packhaging | 356-ball LBGA | 356-LBGA |
| Process Technology | 0.18 µm CMOS | 0.18 μm CMOS |
| Configuration Modes | PS / PPS / PPA / JTAG (IEEE 1532) | — |
| Speed Grade | C8 | C7 |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance status] |
| Uri ng Pagpapasok | Surface Mount (BGA) | — |
| Level ng MSL | [DATA_NEEDED: MSL level] | — |
| Manufacturer | — | Intel (formerly Altera) |
| Series | — | APEX20K |
| Maximum Logic Elements | — | 53,248 |
| User I/O Pins | — | 252 |
| Embedded Memory (Bits) | — | 53,248 |
| Number of PLLs | — | 4 |
| Core Voltage | — | 2.5 V |
| I/O Standards Supported | — | 1.8V, 2.5V, 3.3V, 5V (MultiVolt) |
| Programming Interface | — | IEEE 1149.1 JTAG |