EP20K100CF144C7 vs EP20K100CB356C7 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K100CF144C7 sa pamamagitan ng Intel at EP20K100CB356C7 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EP20K100CB356C7 - APEX20K FPGA 100K Gates 252 I/O 356-BGA | Intel
EP20K100CB356C7 ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EP20K100CF144C7 | EP20K100CB356C7 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Huling Pagbili |
| Series | APEX-20K | APEX20K |
| Family | APEX-20K Field Programmable Gate Array | — |
| Logic Elements / Cells | 4,160 | — |
| Total RAM Bits | 53,248 | — |
| Number of Logic Elements | 4,160 | — |
| Number of I/O | 93 | — |
| Number of Gates | 100,000 system gates | — |
| Voltage - Supply | 1.8 V core, 3.3 V I/O (typical APEX-20K rails) | — |
| Uri ng Pagpapasok | Surface Mount | — |
| Packhaging / Kaso | 144-LQFP | — |
| Package Dimensions | 22 x 22 mm, 0.5 mm pitch | — |
| Temperature na Operasyon | 0C to +85C (commercial) | Commercial grade |
| Process Technology | 0.18 micron CMOS SRAM | 0.18 μm CMOS |
| Configuration Mode | Passive Serial, JTAG (IEEE 1149.1) | — |
| PLLs | 4 (per APEX-20K family architecture) | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance status] |
| Speed Grade | C7 (commercial) | C7 |
| Manufacturer | — | Intel (formerly Altera) |
| Typical Gates | — | 100,000 |
| Maximum Logic Elements | — | 53,248 |
| User I/O Pins | — | 252 |
| Packhaging | — | 356-LBGA |
| Embedded Memory (Bits) | — | 53,248 |
| Number of PLLs | — | 4 |
| Core Voltage | — | 2.5 V |
| I/O Standards Supported | — | 1.8V, 2.5V, 3.3V, 5V (MultiVolt) |
| Programming Interface | — | IEEE 1149.1 JTAG |