EP20K100CF144C8 vs EP20K100CF144C7ES Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K100CF144C8 sa pamamagitan ng Intel at EP20K100CF144C7ES sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP20K100CF144C8 | EP20K100CF144C7ES |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | NRND |
| Family | APEX-20K | APEX-20K |
| Typical Gates | 100,000 | 100,000 |
| Logic Elements | 4,160 | 4,160 |
| Total RAM Bits | 53,248 | — |
| User I/O | 93 | — |
| Packhaging | 144-LQFP | 144-LQFP (20x20 mm) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Process Technology | 0.18 micron CMOS | — |
| Speed Grade | -8 (commercial) | C7 (commercial, mid-speed) |
| Temperature na Operasyon | 0C to +85C (commercial) | 0C to +85C (commercial) |
| JTAG (IEEE 1149.1) | Yes | — |
| In-System Programmability (ISP) | Yes | — |
| PCI Compliance | 3.3V and 5.0V | — |
| Voltage - Supply | 2.5V / 3.3V | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance status] |
| Embedded Memory (RAM bits) | — | 53,248 |
| User I/O Pins | — | 93 |
| DLLs / Clock Management | — | 4 DLLs |
| Core Voltage | — | 1.8 V (typical APEX-20K VCCINT) |
| I/O Voltage Reference | — | MultiVolt I/O - 3.3 V / 5 V tolerant |
| Architecture | — | MultiCore (LUT + Embedded System Blocks) |
| Programming File Format | — | Quartus II / MAX+PLUS II SOF / POF |
| Variant Suffix | — | ES (engineering sample / special order) |
| Level ng MSL | — | [DATA_NEEDED: MSL Level] |