EP20K100CF324C8ES vs EP20K100CF324C8 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K100CF324C8ES sa pamamagitan ng Intel at EP20K100CF324C8 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP20K100CF324C8ES | EP20K100CF324C8 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | NRND |
| Series | APEX 20K | — |
| Family | EP20K100 | APEX-20K |
| Typical Gates | 100,000 | 100,000 |
| Maximum System Gates | 263,000 | — |
| Logic Elements / Cells | 4,160 | — |
| Embedded Array Blocks (EABs) | 26 | — |
| Total RAM Bits | 53,248 | — |
| Maximum User I/O | 246 | 246 |
| Number of I/O Banks | 8 | — |
| Supply Voltage (Core) | 1.8 V | — |
| I/O Standards Supported | 1.8 V / 2.5 V / 3.3 V / 5.0 V LVTTL/LVCMOS | — |
| Number of PLLs | 4 | — |
| Packhaging | 324-BGA (FineLine BGA) | 324-FBGA (FineLine BGA) |
| Speed Grade | C8 (commercial) | C8 (commercial, 8 ns) |
| Temperature na Operasyon | 0 C to +85 C (commercial) | 0°C to +85°C (commercial) |
| Configuration Method | SRAM, serial PROM or JTAG | — |
| Process Technology | 0.18 um CMOS | 0.18 µm CMOS |
| Uri ng Pagpapasok | Surface Mount | — |
| Logic Elements | — | 4,160 |
| Embedded RAM Bits | — | 53,248 |
| Embedded System Blocks (ESBs) | — | 26 |
| Ball Pitch | — | 1.0 mm |
| Core Voltage | — | 1.8 V typical |
| Configuration Interface | — | JTAG (IEEE 1149.1), serial/parallel |
| I/O Standards | — | LVCMOS, LVTTL, SSTL, HSTL |
| Design Software | — | Quartus II (legacy) |
| Tindminan RoHS | — | [DATA_NEEDED: RoHS status] |