EP20K100CQ240C8 vs EP20K100CQ208C8 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K100CQ240C8 sa pamamagitan ng Intel at EP20K100CQ208C8 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP20K100CQ240C8 | EP20K100CQ208C8 |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | APEX 20K | — |
| Series | EP20K100 | APEX 20KE |
| Typical Gates | 100,000 | 100,000 |
| Maximum System Gates | 263,000 | 263,000 |
| Logic Elements | 4,160 | 4,160 |
| Embedded Memory (ESB) | 53,248 bits | — |
| User I/O Pins | 189 | 208 |
| Packhaging | 240-pin PQFP (QFP) | 208-PQFP (28x28 mm) |
| Speed Grade | C8 (commercial, -8) | C8 |
| Temperature na Operasyon | 0C to +85C (commercial) | 0C to +85C (Commercial) |
| Core Voltage | 2.5 V | — |
| I/O Standards | LVTTL, LVCMOS, PCI | — |
| Configuration Interface | JTAG (IEEE 1149.1), serial/parallel | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Programming Method | SRAM-based, in-system programmable | — |
| Embedded System Block (ESB) Bits | — | 53,248 |
| Dedicated RAM Bits | — | 100,000 |
| Number of PLLs | — | 4 |
| Supply Voltage Core | — | 1.8 V |
| I/O Standard Support | — | 1.8V / 2.5V / 3.3V / 5.0V LVTTL/LVCMOS, 3.3V PCI |
| Configuration Modes | — | Passive Serial, Passive Parallel Synchronous, Passive Parallel Asynchronous, Boundary-Scan JTAG |
| Uri ng Pagpapasok | — | Surface Mount |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |