EP20K100CQ240C8 vs EP20K100CQ240C7 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K100CQ240C8 sa pamamagitan ng Intel at EP20K100CQ240C7 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP20K100CQ240C8 | EP20K100CQ240C7 |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | APEX 20K | APEX-20K |
| Series | EP20K100 | — |
| Typical Gates | 100,000 | — |
| Maximum System Gates | 263,000 | — |
| Logic Elements | 4,160 | 53,248 |
| Embedded Memory (ESB) | 53,248 bits | — |
| User I/O Pins | 189 | — |
| Packhaging | 240-pin PQFP (QFP) | — |
| Speed Grade | C8 (commercial, -8) | C7 |
| Temperature na Operasyon | 0C to +85C (commercial) | 0C to +85C (commercial) |
| Core Voltage | 2.5 V | — |
| I/O Standards | LVTTL, LVCMOS, PCI | — |
| Configuration Interface | JTAG (IEEE 1149.1), serial/parallel | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | unknown |
| Programming Method | SRAM-based, in-system programmable | — |
| Device Type | — | FPGA (Field Programmable Gate Array) |
| System Gates | — | 100,000 |
| Embedded Memory Bits | — | 4,160 |
| Maximum User I/O Pins | — | 189 |
| Package Type | — | 240-BFQFP |
| Supply Voltage - Core | — | [DATA_NEEDED: core voltage] |
| I/O Standards Supported | — | LVTTL, LVCMOS, PCI, GTL (per family datasheet) |
| Number of PLLs | — | 4 (per APEX-20K family datasheet) |
| Embedded System Blocks (ESBs) | — | Yes (per APEX-20K family) |
| Uri ng Pagpapasok | — | Surface Mount |
| Lead-Free | — | unknown |
| Level ng MSL | — | [DATA_NEEDED: MSL rating] |
| Programming Tool | — | Altera Quartus / MAX+PLUS II (per family) |