EP20K100CT144C7ES vs EP20K100CT144C8ES Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K100CT144C7ES sa pamamagitan ng Altera at EP20K100CT144C8ES sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EP20K100CT144C7ES - APEX-20K 100K Gate FPGA, 93 I/O, 144-LQFP | Altera
EP20K100CT144C7ES NrndIntel
EP20K100CT144C8ES - APEX-20K FPGA 4160 LE 53Kb RAM 144-LQFP | Intel
EP20K100CT144C8ES ObsoletePagsanggunian na paghahambing
| Parametro | EP20K100CT144C7ES | EP20K100CT144C8ES |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Obsolete |
| Series | APEX-20K | APEX-20K |
| Core Voltage (VCCINT) | 2.375 V to 2.625 V | — |
| Typical Gate Count | 100,000 gates | — |
| Logic Elements | 4,160 | 4,160 |
| Total RAM Bits | 53,248 bits | 53,248 |
| User I/O Pins | 93 | — |
| Packhaging | 144-LQFP (20x20 mm) | — |
| Temperature na Operasyon | 0C to +85C (Commercial) | 0C to +85C (per Altera APEX-20K datasheet commercial grade) |
| Process Technology | 0.18 µm CMOS | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| MultiVolt I/O Levels | 1.8 V, 2.5 V, 3.3 V, 5 V | — |
| Configuration Interface | IEEE 1149.1 JTAG | Serial / Byte-wide / JTAG |
| Level ng MSL | 3 | 3 (168 Hours) |
| Tindminan RoHS | Compliant (per Besenchips listing) | [DATA_NEEDED: RoHS status not stated in provided web data] |
| Lead-Free | Yes | — |
| Manufacturer | — | Intel (formerly Altera) |
| Device Family | — | EP20K100 |
| LABs/CLBs | — | 416 |
| Number of I/O Pins | — | 93 |
| Package Type | — | 144-LQFP |
| Package Code | — | TQFP-144 |
| Lead Pitch | — | 0.5 mm |
| Body Size | — | 20 mm x 20 mm |
| Speed Grade | — | C8 |
| Suffix | — | ES (Engineering Sample) |