EP20K100ETC144-2N vs EP20K100ETC144-1N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K100ETC144-2N sa pamamagitan ng Altera at EP20K100ETC144-1N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP20K100ETC144-2N | EP20K100ETC144-1N |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Obsolete |
| Family | APEX-20KE | APEX-20KE |
| Device Type | FPGA (Field Programmable Gate Array) | — |
| Number of Logic Elements/Cells | 4160 | — |
| Number of LABs/CLBs | 416 | — |
| Total RAM Bits | 53248 | — |
| Number of Gates | 263000 (typical) | — |
| Number of User I/Os | 92 | — |
| Packhaging | 144-LQFP (TQFP, 20x20 mm, 0.5 mm pitch) | 144-LQFP (TQFP) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Operating Supply Voltage (Core) | 1.71 V to 1.89 V (1.8 V nominal) | — |
| Maximum Operating Frequency | 250 MHz | — |
| Propagation Delay | 1.6 ns | — |
| Process Technology | 0.22 µm all-layer copper-metal | 0.22 µm CMOS |
| Hanay ng Temperature na Operasyon | 0 C to 85 C (TJ) | — |
| ESBs (Embedded System Blocks) | 4 | — |
| Programming Interface | JTAG (IEEE 1149.1) / FastON | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS compliance status] | Unknown [DATA_NEEDED: RoHS status] |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Logic Elements | — | 53248 |
| Logic Cells | — | 4160 |
| System Gates | — | 100000 |
| User I/Os | — | 92 |
| Core Voltage | — | 1.8 V |
| Temperature na Operasyon | — | 0 °C to +85 °C |
| Embedded Array Blocks (EABs) | — | Yes (32-bit x 2K RAM/ROM/FIFO) |
| Configuration Interface | — | JTAG (IEEE 1149.1) / IEEE 1532 ISC |
| Programming Software | — | MAX+PLUS II / Quartus II (legacy) |
| Device Series | — | APEX 20K 416 Macro 92 IOs |