EP20K100FC144-2X vs EP20K100FC144-1X Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K100FC144-2X sa pamamagitan ng Intel at EP20K100FC144-1X sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP20K100FC144-2X | EP20K100FC144-1X |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Obsolete |
| Family | APEX-20K | — |
| Logic Elements | 4,160 | — |
| Number of LABs/CLBs | 416 | — |
| Total RAM Bits | 53,248 | — |
| Number of I/O | 93 | — |
| Number of Gates | [DATA_NEEDED: gate count] | 100,000 (typical system gates) |
| Core Voltage | 2.5 V | [DATA_NEEDED: VCCINT] |
| I/O Voltage | 3.3 V / 5 V tolerant | [DATA_NEEDED: VCCIO range] |
| Temperature na Operasyon | [DATA_NEEDED: operating temp range] | — |
| Speed Grade | -2 | -1 (standard) |
| Packhaging | 144-LQFP (FC) | 144-pin TQFP (FC) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Level ng MSL | 3 | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | Not RoHS compliant (legacy commercial TQFP) |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Architecture | LUT-based with embedded array blocks | — |
| Programming Interface | JTAG (IEEE 1149.1) | — |
| Series | — | APEX-20K |
| Number of Logic Elements (LEs) | — | 4,160 |
| Logic Array Blocks (LABs) | — | 416 |
| Embedded RAM Bits | — | 53,248 |
| Number of User I/O | — | 93 |
| Temperature Grade | — | Commercial (0 °C to +85 °C) |
| Process Technology | — | 0.18 µm CMOS, SRAM-based configuration |
| Configuration Mode | — | Passive Serial / Passive Parallel / Boundary Scan |
| Lifecycle | — | Obsolete — discontinued by Intel/Altera |