EP20K100FC324-2X vs EP20K100FC324-3 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K100FC324-2X sa pamamagitan ng Altera at EP20K100FC324-3 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EP20K100FC324-2X - APEX 20K FPGA 100K Gates 324-BGA | Intel / Altera
EP20K100FC324-2X Obsolete
Pagsanggunian na paghahambing
| Parametro | EP20K100FC324-2X | EP20K100FC324-3 |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | APEX-20K | APEX 20K (non-KE) |
| Logic Elements | 4,160 | 4,160 |
| Typical Gates | 100,000 | — |
| Maximum System Gates | 263,000 | — |
| Maximum User I/O | 252 | — |
| Embedded RAM Bits | 53,248 | — |
| Operating Frequency (max) | 200 MHz | — |
| Propagation Delay | 1.6 ns | 1.6 ns |
| Process Technology | 0.22 µm CMOS | 0.22 µm CMOS |
| Core Supply Voltage | 2.5 V | 2.5 V |
| I/O Supply Voltage | 3.3 V (5 V tolerant I/O) | — |
| Packhaging | 324-ball FineLine BGA (FBGA) | 324-pin FBGA (Fine-pitch BGA) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Temperature na Operasyon | 0 °C to +85 °C (Commercial) | 0 °C to 85 °C (Commercial) |
| Configuration Interface | JTAG (IEEE 1149.1) / Serial / Parallel | — |
| Tindminan RoHS | Compliant | [DATA_NEEDED: RoHS status] |
| Series | — | APEX 20K |
| System Gates | — | 100,000 |
| Maximum Logic Blocks | — | 26 |
| Embedded Memory (RAM bits) | — | 53,248 |
| User I/O Pins | — | 252 |
| Total RAM bits | — | 53,248 |
| Maximum Internal Frequency | — | 167 MHz |
| Speed Grade | — | -3 (slowest) |
| Package Body Size | — | 45 x 45 mm |
| Ball Pitch | — | 1.27 mm |
| Programming Interface | — | IEEE 1149.1 JTAG |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |