EP20K100FC324-3V vs EP20K60EFC324-2N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K100FC324-3V sa pamamagitan ng Altera at EP20K60EFC324-2N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP20K100FC324-3V | EP20K60EFC324-2N |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Obsolete |
| Series | APEX-20K® | APEX-20KE |
| Family | APEX 20K | APEX 20K |
| Number of Logic Elements / Cells | 4,160 | — |
| Total System Gates | 100,000 | 60,000 |
| Total RAM Bits | 53,248 | 32,768 |
| Number of LABs / CLBs | 416 | — |
| Number of I/O | 252 | 196 |
| Voltage - Supply | 1.71 V to 1.89 V (core 2.5 V) | — |
| Temperature na Operasyon | 0 °C to 85 °C (TJ) | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Packhaging / Kaso | 324-BGA (FineLine) | 324-BGA (FineLine BGA, 19x19 mm) |
| Supplier Device Package | 324-FBGA (19 x 19 mm) | 324-FBGA (19x19) |
| Technology | 0.22 µm CMOS | — |
| Pin-to-Pin Delay | 3.6 ns | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | unknown |
| Number of Logic Elements/Cells | — | 2,560 |
| Number of Logic Array Blocks (LABs/CLBs) | — | 2,560 |
| Core Voltage Supply | — | 1.71 V to 1.89 V (1.8 V typ.) |
| Internal Frequency (max) | — | 200 MHz |
| Propagation Delay | — | 1.72 ns |
| Operating Temperature Range (TJ) | — | 0 °C to 85 °C (commercial) |
| Process Technology | — | 0.22 µm CMOS |
| Architecture | — | MultiCore (LUT + ESB memory + product-term) |
| Configuration Method | — | Passive Serial / JTAG (IEEE 1149.1) |