EP20K100QC208-2 vs EP20K100QC208-1 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K100QC208-2 sa pamamagitan ng Altera at EP20K100QC208-1 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP20K100QC208-2 | EP20K100QC208-1 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Obsolete |
| Manufacturer | Altera | — |
| Product Series | APEX-20K | — |
| Device Type | Field Programmable Gate Array (FPGA) | FPGA (Field Programmable Gate Array) |
| Logic Elements / Cells | 4160 | 4,160 |
| Number of LABs / CLBs | 416 | — |
| Total RAM Bits | 53248 | — |
| Number of User I/Os | 159 | — |
| Number of Gates | 263000 | — |
| Packhaging / Kaso | 208-BFQFP (208-PQFP 28x28) | — |
| Terminal Form | Gull wing | — |
| Number of Terminals | 208 | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Temperature na Operasyon | 0°C to 85°C (TJ) | 0 °C to +85 °C (commercial) |
| Supply Voltage (VCC) | 1.71 V ~ 1.89 V (per one distributor listing; verify against APEX-20K datasheet) | — |
| I/O Standard Support | [DATA_NEEDED: I/O standard support] | — |
| Maximum Propagation Delay (-2 speed grade) | [DATA_NEEDED: max tPD for -2 speed grade] | — |
| Configuration Technology | [DATA_NEEDED: configuration technology details] | — |
| Level ng MSL | [DATA_NEEDED: MSL level] | — |
| Tindminan RoHS | unknown | unknown |
| Product Lifecycle | NRND / legacy source through Rochester Electronics | — |
| Family | — | APEX 20K |
| Equivalent Logic Gates | — | 100,000 |
| Typical Gates | — | 26,624 |
| Embedded RAM | — | 53,248 bits |
| Maximum Operating Frequency | — | 250 MHz |
| Propagation Delay (tPD) | — | 1.6 ns |
| Speed Grade | — | -1 |
| Supply Voltage (Core) | — | 2.5 V |
| Process Technology | — | 0.22 µm CMOS |
| Number of PLLs | — | 4 |
| Packhaging | — | PQFP-208 (Plastic Quad Flat Pack) |
| Bilang ng Pin | — | 208 |
| User I/Os (max) | — | [DATA_NEEDED: exact user-IO count for PQFP-208] |
| Configuration | — | SRAM-based, volatile |