EP20K1500CB652C7ES vs EP20K1000EBI652-2 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K1500CB652C7ES sa pamamagitan ng Intel at EP20K1000EBI652-2 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EP20K1000EBI652-2 - APEX 20KE 1M Gates FPGA, BGA-652 | Intel / Altera
EP20K1000EBI652-2 ObsoletePagsanggunian na paghahambing
| Parametro | EP20K1500CB652C7ES | EP20K1000EBI652-2 |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Obsolete |
| Series | APEX 20KC | — |
| Manufacturer | Intel (formerly Altera) | — |
| Logic Elements / Cells | 51,840 | — |
| Typical Gates | 1,500,000 | 1,000,000 |
| Number of I/O | 488 | — |
| Voltage - Supply | 1.8 V core, 3.3 V I/O | — |
| Temperature na Operasyon | 0C to +85C (commercial) | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (BGA) |
| Packhaging / Kaso | 652-BGA (CB652) | — |
| Number of Logic Array Blocks | [DATA_NEEDED: LAB count] | — |
| Total RAM Bits | 216,576 (approx. 216 Kb ESB) | — |
| Number of Gates | 1,500,000 typical | — |
| Speed Grade | 7 | -2 |
| PLLs | 4 | — |
| I/O Standards | LVTTL, LVCMOS, PCI, GTL+, HSTL, SSTL | — |
| Process Technology | 0.18 µm CMOS | 0.18 micrometer CMOS, all-layer copper |
| ESB Memory | Embedded System Block (dual-port RAM/ROM/FIFO) | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance] |
| Device Family | — | APEX 20KE |
| Logic Elements | — | 38,400 |
| Maximum User I/O | — | 488 |
| Packhaging | — | BGA-652 (FineLine BGA, 45 x 45 mm) |
| Ball Pitch | — | 1.27 mm |
| Hanay ng Temperature na Operasyon | — | Industrial -40C to +100C |
| Supply Voltage (Core) | — | 1.8 V |
| Embedded System Block Memory | — | [DATA_NEEDED: ESB memory size] |
| Embedded Multiplier/Accumulator Blocks | — | [DATA_NEEDED: number of multiplier blocks] |
| Phase-Locked Loops (PLLs) | — | 4 |
| Propagation Delay | — | 1.6 ns |
| Internal Operating Frequency | — | 350 MHz |
| Configuration Modes | — | PS, PPS, PPA, JTAG |
| Level ng MSL | — | [DATA_NEEDED: MSL rating] |