EP20K1500CF33C7 vs EP20K1500CF33C8ES Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K1500CF33C7 sa pamamagitan ng Intel at EP20K1500CF33C8ES sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP20K1500CF33C7 | EP20K1500CF33C8ES |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Huling Pagbili |
| Family | APEX 20KC | — |
| Series | APEX 20KC | APEX 20K (APEX 20KE family) |
| Logic Elements / Cells | 51840 | — |
| Number of Registers | 51840 | — |
| Total RAM Bits | 442368 | — |
| Number of I/O | [DATA_NEEDED: exact user I/O count for 1020-BBGA] | — |
| Number of Gates | 1500000 | — |
| Supply Voltage - Core | 1.8 V | — |
| Supply Voltage - I/O | 1.5 V to 3.3 V (bank-dependent) | — |
| Speed Grade | -7 (fastest commercial) | -1 (C8) |
| Temperature na Operasyon | 0C to +85C (commercial) | [DATA_NEEDED: operating temperature range] |
| Packhaging / Kaso | 1020-BBGA (FineLine BGA) | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Configuration Technology | SRAM (volatile, reprogrammable) | — |
| Embedded Memory | ESB dual-port RAM up to 32K x 36 bits/block | — |
| PLL Count | Up to 4 | — |
| LVDS Support | Yes | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS compliance for -7 speed grade] | [DATA_NEEDED: RoHS compliance for ES variant] |
| Manufacturer | — | Intel (formerly Altera) |
| System Gates | — | 1,500,000 |
| Maximum Gates (Equivalent) | — | 2,392,000 |
| Logic Elements | — | 51,840 |
| Embedded System Block (ESB) Bits | — | 442,368 |
| CAM Bits | — | 216 Kbit |
| Number of PLLs | — | 4 |
| Number of Clocks | — | 8 clock pins |
| Maximum User I/O | — | 808 (1020-FBGA) |
| Packhaging | — | 1020-FBGA (FCBGA), 33x33 mm |
| Voltage - Supply (Core) | — | 1.8 V nominal (multiVolt I/O supports 1.8/2.5/3.3/5.0 V) |
| I/O Standard Support | — | LVTTL, LVCMOS, PCI, SSTL, HSTL, LVDS (multiVolt) |
| JTAG / Boundary Scan | — | IEEE 1149.1 compliant |
| Programming Interface | — | ByteBlaster / MasterBlaster / Altera USB-Blaster |
| Sample Tier | — | ES (engineering sample) |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |