EP20K1500CF33C7ES vs EP20K1500CF33C8 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K1500CF33C7ES sa pamamagitan ng Intel at EP20K1500CF33C8 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP20K1500CF33C7ES | EP20K1500CF33C8 |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | APEX20K | APEX 20K |
| Series | APEX 20K | — |
| Manufacturer | Intel (formerly Altera) | — |
| Logic Elements / Cells | 51840 | 51,840 |
| Total RAM Bits | [DATA_NEEDED: total RAM bits] | 442,368 |
| Number of I/O | 808 | 808 (maximum user I/O) |
| Number of Gates | 1500000 | — |
| Voltage - Supply | 2.5V core, 3.3V I/O | — |
| Temperature na Operasyon | 0C to +85C (commercial) | 0 °C to +85 °C (Commercial) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (BGA) |
| Packhaging / Kaso | 1020-BBGA, FCBGA (FineLine BGA) | 1020-BBGA, FCBGA (FineLine BGA) |
| Supplier Device Package | 1020-BGA | — |
| Programmable Type | In System Programmable (SRAM-based) | — |
| Configuration Method | SRAM / JTAG | — |
| I/O Standards | LVTTL, LVCMOS, PCI, GTL, SSTL | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | Compliant per distributor listings |
| Number of Gates (typical) | — | 1,500,000 |
| Number of LABs/CLBs | — | 2,592 LABs (organized in MegaLABs) |
| Number of Embedded System Blocks | — | 216 ESBs |
| Number of PLLs | — | 4 |
| Supply Voltage (VCCINT) | — | 1.8 V (typical for APEX 20K core) |
| Supply Voltage (VCCIO) | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V (bank-dependent) |
| Number of Terminals | — | 1020 balls |
| Process Technology | — | 0.18 µm CMOS, SRAM-based configuration |
| Configuration | — | SRAM-based, JTAG (IEEE 1149.1) |
| Lead-Free | — | Yes (per distributor specifications) |