EP20K200CF672C7ES vs EP20K200CF672C8ES Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K200CF672C7ES sa pamamagitan ng Intel at EP20K200CF672C8ES sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP20K200CF672C7ES | EP20K200CF672C8ES |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | APEX-II (EP20K) | APEX 20K |
| Logic Elements | 8,320 | — |
| Typical Gates | 200,000 | 200,000 system gates |
| Embedded RAM (max) | 106,496 bits | — |
| Number of Logic Array Blocks (LABs) | 832 | — |
| Maximum User I/O Pins | 376 | 1,064 |
| Number of PLLs | 4 | — |
| Packhaging | 672-ball FineLine BGA | 672-ball FineLine BGA |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount (BGA) |
| Core Voltage | 1.8 V | 1.8 V |
| Temperature na Operasyon | 0 °C to +85 °C (Commercial) | 0C to +85C (commercial) |
| Speed Grade | 7 | C8 (8 ns pin-to-pin) |
| Process Technology | 0.18 µm CMOS | [DATA_NEEDED: process node] |
| Level ng Sensitivity sa Asid ng Moisture (MSL) | 3 (168 Hours) | — |
| Packaging | Tray | — |
| Maximum Logic Elements | — | 8,320 |
| Embedded RAM Bits | — | 212,992 bits |
| Configuration Method | — | SRAM, requires external PROM |
| Tindminan RoHS | — | [DATA_NEEDED: rohs status] |
| Status Suffix | — | ES (Engineering Sample) |
| I/O Standards | — | LVTTL, LVCMOS, PCI, GTL+, SSTL, HSTL |
| Logic Element Architecture | — | 4-input LUT with dedicated carry/cascade |
| Embedded Memory Type | — | RAM / ROM / CAM blocks |