EP20K200CF672C8ES vs EP20K200CF672C7ES Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K200CF672C8ES sa pamamagitan ng Intel at EP20K200CF672C7ES sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP20K200CF672C8ES | EP20K200CF672C7ES |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | APEX 20K | APEX-II (EP20K) |
| Maximum Logic Elements | 8,320 | — |
| Typical Gates | 200,000 system gates | 200,000 |
| Maximum User I/O Pins | 1,064 | 376 |
| Embedded RAM Bits | 212,992 bits | — |
| Packhaging | 672-ball FineLine BGA | 672-ball FineLine BGA |
| Speed Grade | C8 (8 ns pin-to-pin) | 7 |
| Temperature na Operasyon | 0C to +85C (commercial) | 0 °C to +85 °C (Commercial) |
| Core Voltage | 1.8 V | 1.8 V |
| Configuration Method | SRAM, requires external PROM | — |
| Process Technology | [DATA_NEEDED: process node] | 0.18 µm CMOS |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount (BGA) |
| Tindminan RoHS | [DATA_NEEDED: rohs status] | — |
| Status Suffix | ES (Engineering Sample) | — |
| I/O Standards | LVTTL, LVCMOS, PCI, GTL+, SSTL, HSTL | — |
| Logic Element Architecture | 4-input LUT with dedicated carry/cascade | — |
| Embedded Memory Type | RAM / ROM / CAM blocks | — |
| Logic Elements | — | 8,320 |
| Embedded RAM (max) | — | 106,496 bits |
| Number of Logic Array Blocks (LABs) | — | 832 |
| Number of PLLs | — | 4 |
| Level ng Sensitivity sa Asid ng Moisture (MSL) | — | 3 (168 Hours) |
| Packaging | — | Tray |