EP20K200CF672C8ES vs EP20K200CQ208C8 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K200CF672C8ES sa pamamagitan ng Intel at EP20K200CQ208C8 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP20K200CF672C8ES | EP20K200CQ208C8 |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | NRND |
| Family | APEX 20K | APEX 20KC |
| Maximum Logic Elements | 8,320 | — |
| Typical Gates | 200,000 system gates | — |
| Maximum User I/O Pins | 1,064 | — |
| Embedded RAM Bits | 212,992 bits | 106,496 |
| Packhaging | 672-ball FineLine BGA | 208-pin PQFP / BFQFP (28x28 mm) |
| Speed Grade | C8 (8 ns pin-to-pin) | C8 |
| Temperature na Operasyon | 0C to +85C (commercial) | — |
| Core Voltage | 1.8 V | — |
| Configuration Method | SRAM, requires external PROM | — |
| Process Technology | [DATA_NEEDED: process node] | 0.18 µm CMOS (0.15 µm effective) |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount |
| Tindminan RoHS | [DATA_NEEDED: rohs status] | Compliant |
| Status Suffix | ES (Engineering Sample) | — |
| I/O Standards | LVTTL, LVCMOS, PCI, GTL+, SSTL, HSTL | — |
| Logic Element Architecture | 4-input LUT with dedicated carry/cascade | — |
| Embedded Memory Type | RAM / ROM / CAM blocks | — |
| Series | — | APEX-20K® |
| Core Supply Voltage | — | 1.71 V to 1.89 V (1.8 V nominal) |
| System Gates | — | 200,000 |
| Logic Elements | — | 8,320 |
| Maximum Internal Frequency | — | 301.21 MHz |
| Maximum User I/O | — | 144 |
| Terminal Form | — | Gull Wing |
| Package Code | — | FQFP |
| Temperature Grade | — | Commercial |
| Programmability | — | In-system via JTAG (IEEE 1149.1) |